倪熔华｜复旦大学｜学者主页

2025

A 37.5fs-rms Jitter and −254.1dB FoM Fractional-N Sampling PLL with Reference-Phase-Selection and Complementary-DTC Achieving 8× DTC Range Reduction and Zero DTC Delay Offset

Yanchao Liu, Kaihang Wang, Yang Li, Yu‐Chen Liu, Xiaohua Yu, Ronghua Ni

IEEE Custom Integrated Circuits Conference (CICC)

2019

A 28-nm 75-fsrms Analog Fractional- $N$ Sampling PLL With a Highly Linear DTC Incorporating Background DTC Gain Calibration and Reference Clock Duty Cycle Correction

Wanghua Wu, Chih-Wei Yao, K. Godbole, Rong-Hua Ni, Pei-Yuan Chiang, Yongping Han, Yong-Rong Zuo, Ashutosh Verma, I. Lu, S. Son, T. Cho

IEEE Journal of Solid-State Circuits

DOI

2019

A Sub-6-GHz 5G New Radio RF Transceiver Supporting EN-DC With 3.15-Gb/s DL and 1.27-Gb/s UL in 14-nm FinFET CMOS

Jongwoo Lee, Kiyong Son, Hyung-Taik Lim, Daechul Jeong, Ilyong Jong, Sanghyun Baek, Jae Hoon Lee, Rong-Hua Ni, Yong-Rong Zuo, Chih-Wei Yao, Seungchan Heo, Sang-Woo Han, T. Cho, Inyup Kang, Joonhee Lee, Byoungjoong Kang, Jeongyeol Bae, Jaehyuk Jang, Seunghyun Oh, Ji-Soo Chang, Sanghoon Kang

IEEE Journal of Solid-State Circuits

DOI

2019

21.6 A Sub-6GHz 5G New Radio RF Transceiver Supporting EN-DC with 3.15Gb/s DL and 1.27Gb/s UL in 14nm FinFET CMOS

Jongwoo Lee, Sang-Woo Han, Joonhee Lee, Byoungjoong Kang, Jeongyeol Bae, Jaehyuk Jang, Seunghyun Oh, S. Ahn, Sanghoon Kang, Quang-Diep Bui, Kiyong Son, Hyung-Taik Lim, Daechul Jeong, Rong-Hua Ni, Yong-Rong Zuo, Ilyong Jong, Chih-Wei Yao, Seungchan Heo, T. Cho, Inyup Kang

IEEE International Solid-State Circuits Conference

DOI

2018

A 5.5-7.3 GHz Analog Fractional-N Sampling PLL in 28-nm CMOS with 75 fsrmsJitter and −249.7 dB FoM

Wanghua Wu, Chih-Wei Yao, K. Godbole, Rong-Hua Ni, Pei-Yuan Chiang, Yongping Han, Yong-Rong Zuo, Ashutosh Verma, I. Lu, S. Son, T. Cho

Radio Frequency Integrated Circuits Symposium

DOI

2017

A 14-nm 0.14-psrms Fractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration

Chih-Wei Yao, Rong-Hua Ni, Chung Lau, Wanghua Wu, K. Godbole, Yong-Rong Zuo, Sangsoo Ko, Nam-Seog Kim, Sang-Woo Han, Ikkyun Jo, Joonhee Lee, Juyoung Han, Daehyeon Kwon, Chulho Kim, Shinwoong Kim, S. Son, T. Cho

IEEE Journal of Solid-State Circuits

DOI

2017

24.8 A 14nm fractional-N digital PLL with 0.14psrms jitter and −78dBc fractional spur for cellular RFICs

Chih-Wei Yao, Wing-Fai Loke, Rong-Hua Ni, Yongping Han, Haoyang Li, K. Godbole, Yong-Rong Zuo, Sangsoo Ko, Nam-Seog Kim, Sang-Woo Han, Ikkyun Jo, Joonhee Lee, Juyoung Han, Daehyeon Kwon, Chulho Kim, Shinwoong Kim, S. Son, T. Cho

IEEE International Solid-State Circuits Conference

DOI

2017

Digital PLL design challenges for cellular RFICs

Sangsoo Ko, Chih-Wei Yao, Joonhee Lee, Sang-Woo Han, Daehyeon Kwon, Fai-Lo-Ke Wing, Rong-Hua Ni, T. Cho

International Symposium on Radio-Frequency Integration Technology

DOI

2017

細胞RFICのための0.14ps_rmsジッタと 78dBc分数スパーを持つ24.8A14nm分数NディジタルPLL【Powered by NICT】

Chih-Wei Yao, L. Fai, Rong-Hua Ni, Yong-Ping Han, Hao-Yang Li, G. Kunal, Yong-Rong Zuo, Sang-Soo Ko, Nam-Seog Kim, Sang-Wook Han, Jo Ikkyun, Joon-hee Lee, Han Ju-young, Daehyeon Kwon, Chulho Kim, Shinwoong Kim, Son Sang Won, Cho Thomas Byunghak

2014

A 915MHz, 6Mb/s, 80pJ/b BFSK receiver with −76dBm sensitivity for high data rate wireless sensor networks

Rong-Hua Ni, K. Mayaram, T. Fiez

2014 Symposium on VLSI Circuits Digest of Technical Papers

DOI

2013

A 2.4 GHz Hybrid Polyphase Filter Based BFSK Receiver With High Frequency Offset Tolerance for Wireless Sensor Networks

Rong-Hua Ni, K. Mayaram, T. Fiez

IEEE Journal of Solid-State Circuits

DOI

2013

Low power receivers for wireless sensor networks

Rong-Hua Ni

2012

A 2.4GHz hybrid PPF based BFSK receiver with ±180ppm frequency offset tolerance for wireless sensor networks

Rong-Hua Ni, K. Mayaram, T. Fiez

Symposium on VLSI Circuits

DOI

2008

一种用于超高频RFID阅读器的正交下变频混频器的分析与设计(英文)

倪熔华，谈熙，唐长文，闵昊

Journal of Semiconductors

2008

一种全集成CMOS数字电视调谐器射频前端

金黎明，倪熔华，廖友春，闵昊，唐长文

Journal of Semiconductors

2008

一种低噪声高线性度CMOS上变频混频器

金黎明，倪熔华，唐长文，闵昊

《固体电子学研究与进展》

2008

超高频射频识别读写器接收机载波消除射频前端的研究与设计

倪熔华

《复旦大学》

倪熔华

精选作品

期刊论文

A 37.5fs-rms Jitter and −254.1dB FoM Fractional-N Sampling PLL with Reference-Phase-Selection and Complementary-DTC Achieving 8× DTC Range Reduction and Zero DTC Delay Offset

A 28-nm 75-fsrms Analog Fractional- $N$ Sampling PLL With a Highly Linear DTC Incorporating Background DTC Gain Calibration and Reference Clock Duty Cycle Correction

A Sub-6-GHz 5G New Radio RF Transceiver Supporting EN-DC With 3.15-Gb/s DL and 1.27-Gb/s UL in 14-nm FinFET CMOS

21.6 A Sub-6GHz 5G New Radio RF Transceiver Supporting EN-DC with 3.15Gb/s DL and 1.27Gb/s UL in 14nm FinFET CMOS

A 5.5-7.3 GHz Analog Fractional-N Sampling PLL in 28-nm CMOS with 75 fsrmsJitter and −249.7 dB FoM

A 14-nm 0.14-psrms Fractional-N Digital PLL With a 0.2-ps Resolution ADC-Assisted Coarse/Fine-Conversion Chopping TDC and TDC Nonlinearity Calibration

24.8 A 14nm fractional-N digital PLL with 0.14psrms jitter and −78dBc fractional spur for cellular RFICs

Digital PLL design challenges for cellular RFICs

細胞RFICのための0.14ps_rmsジッタと 78dBc分数スパーを持つ24.8A14nm分数NディジタルPLL【Powered by NICT】

A 915MHz, 6Mb/s, 80pJ/b BFSK receiver with −76dBm sensitivity for high data rate wireless sensor networks

A 2.4 GHz Hybrid Polyphase Filter Based BFSK Receiver With High Frequency Offset Tolerance for Wireless Sensor Networks

Low power receivers for wireless sensor networks

A 2.4GHz hybrid PPF based BFSK receiver with ±180ppm frequency offset tolerance for wireless sensor networks

一种用于超高频RFID阅读器的正交下变频混频器的分析与设计(英文)

一种全集成CMOS数字电视调谐器射频前端

一种低噪声高线性度CMOS上变频混频器

超高频射频识别读写器接收机载波消除射频前端的研究与设计

研究方向