张悠慧

2026

BrainFuse: a unified infrastructure integrating realistic biological modeling and core AI methodology

arXiv.org

DOI

2026

Towards Feedback-to-Plan Decisions for Self-Evolving LLM Agents in CUDA Kernel Generation

arXiv.org

DOI

2026

Achieving Cloud-Grade SLOs for Local Mixture-of-Experts Inference through CPU-GPU Hybrid Design

arXiv.org

DOI

2026

PANA: A Fine-Grained Runtime-Adaptive Load Balancing for Parallel SpMV on Multicore CPUs

ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming

DOI

2026

Root-Down Exposure for Maximal Clique Enumeration on GPUs

ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming

DOI

2026

Look Before You Leap : Precision Instruction Supply via SmartScout

International Conference on Supercomputing

DOI

2026

VDHA: Vector-Driven Hash Aggregation for Sparse Matrix-Sparse Vector Multiplication on GPUs

ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming

DOI

2025

BIVM:类脑计算编译框架及其原型研究

《软件学报》

2025

Pipelining Kruskal's: A Neuromorphic Approach for Minimum Spanning Tree

arXiv.org

DOI

2025

AlphaSparseTensor: Discovering Faster Sparse Matrix Multiplication Algorithms on GPUs for LLM Inference

European Conference on Parallel Processing

DOI

2025

Hierarchical Prefetching: A Software-Hardware Instruction Prefetcher for Server Applications

International Conference on Architectural Support for Programming Languages and Operating Systems

DOI

2025

SoftGuide: A Hardware-Software Co-design Predictor for Data-Dependent Branches

IEEE/ACM International Symposium on Cluster, Cloud and Internet Computing

DOI

2024

Research on General-Purpose Brain-Inspired Computing Systems

Journal of Computational Science and Technology

DOI

2024

A Row Decomposition-based Approach for Sparse Matrix Multiplication on GPUs

ACM SIGPLAN Symposium on Principles & Practice of Parallel Programming

DOI

2024

DTrans: A Dataflow-transformation FPGA Accelerator with Nonlinear-operators fusion aiming for the Generative Model

International Conference on Field-Programmable Logic and Applications

DOI

2024

ActiveN: A Scalable and Flexibly-Programmable Event-Driven Neuromorphic Processor

Micro

DOI

2024

Dissecting Conditional Branch Predictors of Apple Firestorm and Qualcomm Oryon for Software Optimization and Architectural Analysis

arXiv.org

DOI

2024

ChameSC: Virtualizing Superscalar Core of a SIMD Architecture for Vector Memory Access

ICCD

DOI

2023

ENLARGE: An Efficient SNN Simulation Framework on GPU Clusters

IEEE Transactions on Parallel and Distributed Systems

DOI

2023

MAICC : A Lightweight Many-core Architecture with In-Cache Computing for Multi-DNN Parallel Inference

Micro

DOI

2023

Multi-Objective Optimization for Floating Point Mix-Precision Tuning

International Symposium on Low Power Electronics and Design

DOI

2023

FABLE: A Development and Computing Framework for Brain-inspired Learning Algorithms

IEEE International Joint Conference on Neural Network

DOI

2022

Accelerating Neural Network Training with Processing-in-Memory GPU

IEEE/ACM International Symposium on Cluster, Cloud and Internet Computing

DOI

2022

A framework for the general design and computation of hybrid neural networks

Nature Communications

DOI

2022

GaBAN: A Generic and Flexibly Programmable Vector Neuro-processor on FPGA

Design Automation Conference

DOI

2022

A review of basic software for brain-inspired computing

CCF Transactions on High Performance Computing

DOI

2021

基于忆阻器的近似计算方法

《清华大学学报(自然科学版)》

DOI

2021

实现软硬件解耦合的类脑计算硬件设计方法

《计算机研究与发展》

2021

Regu2D: Accelerating Vectorization of SpMV on Intel Processors through 2D-partitioning and Regular Arrangement

International Conference on Parallel Processing

DOI

2021

A Reduced Architecture for ReRAM-Based Neural Network Accelerator and Its Software Stack

IEEE transactions on computers

DOI

2021

A Proposal of Software-Hardware Decoupling Hardware Design Method for Brain-Inspired Computing

DOI

2021

Polyhedral-Based Compilation Framework for In-Memory Neural Network Accelerators

ACM Journal on Emerging Technologies in Computing Systems

DOI

2020

SuSy: A Programming Model for Productive Construction of High-Performance Systolic Arrays on FPGAs

2020 IEEE/ACM International Conference On Computer Aided Design (ICCAD)

DOI

2020

A hybrid and scalable brain-inspired robotic platform

Scientific Reports

DOI

2020

Brain-inspired global-local learning incorporated with neuromorphic computing

Nature Communications

DOI

2020

High Performance Simulation of Spiking Neural Network on GPGPUs

IEEE Transactions on Parallel and Distributed Systems

DOI

2020

ERA-LSTM: An Efficient ReRAM-Based Architecture for Long Short-Term Memory

IEEE Transactions on Parallel and Distributed Systems

DOI

2020

Brain-inspired global-local hybrid learning towards human-like intelligence

arXiv.org

2020

A system hierarchy for brain-inspired computing

Nature

DOI

2019

面向阻变存储器的长短期记忆网络加速器的训练和软件仿真

《计算机研究与发展》

2019

Design Guidelines of RRAM based Neural-Processing-Unit: A Joint Device-Circuit-Algorithm Analysis

Design Automation Conference

DOI

2019

FPSA: A Full System Stack Solution for Reconfigurable ReRAM-based NN Accelerator Architecture

International Conference on Architectural Support for Programming Languages and Operating Systems

DOI

2019

Towards artificial general intelligence with hybrid Tianjic chip architecture

Nature

DOI

2019

Training and Software Simulation for ReRAM-Based LSTM Neural Network Acceleration

DOI

2019

A Unified Framework for Training, Mapping and Simulation of ReRAM-Based Convolutional Neural Network Acceleration

IEEE computer architecture letters

DOI

2018

TETRIS: TilE-matching the TRemendous Irregular Sparsity

Neural Information Processing Systems

2018

Bridge the Gap between Neural Networks and Neuromorphic Hardware with a Neural Network Compiler

ACM SIGPLAN Notices

DOI

2018

TETRIS: TilE-matching the TRemendous Irregular Sparsity

Rare & Special e-Zone (The Hong Kong University of Science and Technology)

2017

Parallel Turing Machine, a Proposal

Journal of Computational Science and Technology

DOI

2017

POSTER: Bridge the Gap Between Neural Networks and Neuromorphic Hardware

International Conference on Parallel Architectures and Compilation Techniques

DOI

2017

Hardware support for message-passing in chip multi-processors

International Journal of High Performance Computing and Networking

DOI

2017

In-Place Irregular Computation for Message-Passing Chip-Multiprocessors

2017 46th International Conference on Parallel Processing Workshops (ICPPW)

DOI

2017

Bridge the Gap between Neural Networks and Neuromorphic Hardware with a Neural Network Compiler

International Conference on Architectural Support for Programming Languages and Operating Systems

DOI

2017

Design of a Processor Core Customized for Stencil Computation

DOI

2017

Service-Oriented Architecture on FPGA-Based MPSoC

IEEE Transactions on Parallel and Distributed Systems

DOI

2016

A Cloud Gaming System Based on User-Level Virtualization and Its Resource Scheduling

IEEE Transactions on Parallel and Distributed Systems

DOI

2016

Modelling Spiking Neural Network from the Architecture Evaluation Perspective

Journal of Computational Science and Technology

DOI

2016

NEUTRAMS: Neural network transformation and co-design under neuromorphic hardware constraints

Micro

DOI

2016

ステンシル計算のためのHW/SW協調最適化:カスタム化可能なコアをもつ始まり【Powered by NICT】

2016

Optimized Mapping Spiking Neural Networks onto Network-on-Chip

International Conference on Algorithms and Architectures for Parallel Processing

DOI

2016

ユーザレベル仮想化とその資源スケジューリングに基づくクラウドゲーミングシステム【Powered by NICT】

2016

メッセージパッシングチップマルチプロセッサのためのデータ計算【Powered by NICT】

2016

Neural network transformation under hardware constraints

International Conference on Compilers, Architecture, and Synthesis for Embedded Systems

DOI

2016

Near Data Computation for Message-Passing Chip-Multiprocessors

2016 IEEE 18th International Conference on High Performance Computing and Communications; IEEE 14th International Conference on Smart City; IEEE 2nd International Conference on Data Science and Systems (HPCC/SmartCity/DSS)

DOI

2015

Solving the Global Atmospheric Equations through Heterogeneous Reconfigurable Platforms

TRETS

DOI

2015

Development of a neuromorphic computing system

International Electron Devices Meeting

DOI

2015

Flit transmission method and device of network on chip

2015

Software-Based Lightweight Multithreading to Overlap Memory-Access Latencies of Commodity Processors

International Conference on Parallel Processing

DOI

2015

Position-aware thread-level speculative parallelization for large-scale chip-multiprocessor

Conf. Computing Frontiers

DOI

2014

Customized Network-on-Chip for Message Reduction

International Conference on Algorithms and Architectures for Parallel Processing

DOI

2014

An approach of processor core customization for stencil computation

IEEE International Conference on Application-Specific Systems, Architectures, and Processors

DOI

2013

延时敏感的推测多线程调度策略

《计算机工程与科学》

2013

基于线性阵列处理器的GRAPES核心代码优化

《计算机学报》

2013

面向应用可定制的处理器

《中国教育网络》

2013

Software/Hardware Hybrid Network-on-Chip Simulation on FPGA

IFIP International Conference on Network and Parallel Computing

DOI

2013

Automatic software deployment using user-level virtualization for cloud-computing

Future generations computer systems

DOI

2013

HW/SW approaches to accelerate GRAPES in an FU array

2013 IEEE COOL Chips XVI

DOI

2013

Accelerating solvers for global atmospheric equations through mixed-precision data flow engine

International Conference on Field-Programmable Logic and Applications

DOI

2012

Cloudow:一种基于用户层虚拟化的软件即服务模式运行系统

《中国科学:信息科学》

2012

A Performance Model for Network-on-Chip Wormhole Routers

Journal of Computers

DOI

2012

Cloudow: A SaaS runtime system based on the user-level virtu-alization technology

DOI

2011

Using User-Level Virtualization in Desktop Grid Clients for Application Delivery and Sandboxing

2011 Fourth International Symposium on Parallel Architectures, Algorithms and Programming

DOI

2011

Streaming Legacy Desktop Software from the Cloud

2011

Model of Network-on-Chip routers and performance analysis

IEICE Electronics Express

DOI

2011

A user-space file system for on-demand legacy desktop software

Science China Information Sciences

DOI

2010

Efficient Monte Carlo-based options pricing on graphics processors and its optimizations

Science China Information Sciences

DOI

2010

Converting legacy desktop applications into on-demand personalized software

IEEE Transactions on Services Computing

DOI

2010

A Performance Analytical Approach Based on Queuing Model for Network-on-Chip

International Symposium on Parallel Architectures, Algorithms and Programming

DOI

2010

Method for simulating cores of multi-core processor by adopting time division multiplex

2009

基于应用层虚拟化的可迁移个人计算

《清华大学学报(自然科学版)网络.预览》

2009

THCAS:内容存储系统及其性能优化

《清华大学学报(自然科学版)》

2009

Applying File Information to Block-Level Content Addressable Storage

DOI

2009

Codec-on-Demand Based on User-Level Virtualization

IEICE Trans. Inf. Syst.

DOI

2009

Optimized mapping of pixels into memory for H.264/AVC decoding

IEICE Electronics Express

DOI

2009

A Software-Controlled Cache Coherence Optimization for Snoopy-Based SMP System

2009 International Conference on Computational Intelligence and Natural Computing

DOI

2008

Portable Desktop Applications Based on P2P Transportation and Virtualization

LiSA

2008

Portable desktop applications based on user-level virtualization

Asia-Pacific Computer Systems Architecture Conference

DOI

2008

Design and Implementation of H.264 parallel decoding

Microcomputer Information

2008

On Virtual-Machine-Based Windows File Reads: A Performance Study

IEEE Pacific-Asia Workshop on Computational Intelligence and Industrial Application

DOI

2007

Heterogeneous associative cache for multimedia applications

2007

Design Implementation of Integrated Computing Model Based on Thin-computing

Journal of Chinese Computer Systems

2006

面向集群的消息传递并行程序容错系统

《清华大学学报(自然科学版)》

2006

Service overlay architecture in thin-client computing

Journal of Tsinghua University(Science and Technology)

2005

主动存储系统结构

《计算机学报》

2005

Exploring Design Space Using Transaction Level Models

Asia-Pacific Computer Systems Architecture Conference

DOI

2005

User-level checkpoint and recovery for LAM/MPI

OPSR

DOI

2005

Thckpt: Transparent Checkpointing of Linux Processes Under IA-64

International Conference on Parallel and Distributed Processing Techniques and Applications

2005

A checkpointing/recovery system for MPI applications on cluster of IA-64 computers

2005 International Conference on Parallel Processing Workshops (ICPPW'05)

DOI

2005

THUMPSim : One Simulation Framework for Processor Architecture Evaluation

2004

Using Model-Based Test Program Generator for Simulation Validation

International Conference on Embedded Software and Systems

DOI

2004

Parallel Checkpoint/Recovery on Cluster of IA-64 Computers

International Symposium on Image and Signal Processing and Analysis

DOI

2003

一种新的网络对象存储设备研究

《电子学报》

2003

统一缓存:基于用户层通信的合作缓存技术

《计算机研究与发展》

2003

User-level communication based cooperative caching

OPSR

DOI

2002

Checkpointing and Migration of parallel processes based on Message Passing Interface

2002

A checkpoint-based high availability run-time system for Windows NT clusters

OPSR

DOI

2001

Windows NT环境下的进程检查点设置与回卷恢复

《计算机研究与发展》

2001

Transparent checkpointing and rollback recovery mechanism for Windows NT applications

OPSR

DOI

2000

工作站机群系统自动重构机制

《电子学报》

2000

Solaris系统多线程检查点设置与卷回恢复

《计算机工程与应用》

1999

Quasi-asynchronous migration: a novel migration protocol for PVM tasks

OPSR

DOI

1999

A Task Migration Mechanism for MPI Applications