刘伟强

2026

面向边缘计算的CMOS高能效芯片跨层级设计与多场景优化方法

《华东师范大学学报(自然科学版)》

2026

BIHDC: A Retrainable Fully-Binary Hyperdimensional Computing Accelerator for Edge FPGAs

Asia and South Pacific Design Automation Conference

DOI

2026

Optimized NTT Architecture Based on the Plantard Algorithm for ML-KEM and ML-DSA

IEEE transactions on computers

DOI

2026

A High-Throughput and Efficient Hardware Architecture for SPHINCS+

ACM Transactions on Reconfigurable Technology and Systems

DOI

2026

Instant-CIM: An Instant Neural Radiance Field Computing-In-Memory Architecture for Low-Power and Real-Time AR/VR Rendering

IEEE transactions on computers

DOI

2026

A Lightweight Design of True Random Number Generator Based on Superparamagnetic Tunnel Junction

IEEE Transactions on Electron Devices

DOI

2026

A highly stable high-speed 11T SRAM for energy-efficient operation

Microelectronics Journal

DOI

2026

CT-LNN: FPGA-Based Accelerator for Continuous-Time Liquid Neural Networks

IEEE Transactions on Circuits and Systems I Regular Papers

DOI

2026

Neuromorphic Hyperdimensional Computing for Efficiently Processing Event-Based Data

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

DOI

2026

RLDALS: Reinforcement Learning-Guided Domain-Specific Language Model Framework for Approximate Logic Synthesis

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

DOI

2026

High-Precision Low-Latency Method and Architecture for Softmax Acceleration in Training-Level AI Applications

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

DOI

2026

BitSplat: An Efficient 3D Gaussian Splatting Architecture via Bit-Level Hardware-Algorithm Co-Optimization

IEEE Journal on Emerging and Selected Topics in Circuits and Systems

DOI

2025

低温存内计算芯片设计研究综述

《集成电路与嵌入式系统》

DOI

2025

超维计算硬件设计：进展、趋势和展望

《集成电路与嵌入式系统》

DOI

2025

Crystals-Dilithium数字签名技术硬件实现综述

《电子学报》

2025

An Efficient Methodology for Binary Logarithmic Computations of Floating-Point Numbers With Normalized Output Within One ulp of Accuracy

IEEE transactions on computers

DOI

2025

High-Performance Hardware Implementation of Crystals-Dilithium Based on Improved MDC-NTT

IEEE transactions on computers

DOI

2025

An Energy Efficient Time Domain Computing-in-Memory MRAM Macro with DSRC for Edge AI Application

Information and Communication Technologies and Accessibility

DOI

2025

Low-Cost Yet Effective Trojan Mitigation Techniques for Approximate Systems

IEEE Transactions on Circuits & Systems II Express Briefs

DOI

2024

面向数字信号处理领域的近似计算技术应用与研究进展

《电子与信息学报》

2024

VoAD: A Sub-μW Multiscene Voice Activity Detector Deploying Analog-Frontend Digital-Backend Circuits

IEEE Transactions on Circuits and Systems - II - Express Briefs

DOI

2024

A High-Speed and High-Yield Path-Switching Sensing Circuit for STT-MRAM

IEEE Transactions on Magnetics

DOI

2024

Hardware Security Linking Everything: from Lightweight PUF to Post-Quantum Cryptography Hardware

DOI

2024

Guest Editorial: Special Section on “Approximate Data Processing: Computing, Storage and Applications”

IEEE Transactions on Emerging Topics in Computing

DOI

2024

A Time Efficient Comprehensive Model of Approximate Multipliers for Design Space Exploration

Proceedings/Proceedings - Symposium on Computer Arithmetic

DOI

2024

A Potential Enabler for High-Performance In-Memory Multi-Bit Arithmetic Schemes With Unipolar Switching SOT-MRAM

IEEE Transactions on Circuits and Systems I Regular Papers

DOI

2024

Toward Efficient Retraining: A Large-Scale Approximate Neural Network Framework With Cross-Layer Optimization

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

DOI

2024

Special Section on Emerging Topics in Hardware Computing Systems Security

IEEE Transactions on Emerging Topics in Computing

DOI

2024

A Concealable RRAM Physical Unclonable Function Compatible with In-Memory Computing

DOI

2024

Edge-Side Fine-Grained Sparse CNN Accelerator With Efficient Dynamic Pruning Scheme

IEEE Transactions on Circuits and Systems I Regular Papers

DOI

2023

近似计算新范式在深度学习加速系统中的应用及研究进展

《电子与信息学报》

2023

Towards a Lightweight CRYSTALS-Kyber in FPGAs: an Ultra-lightweight BRAM-free NTT Core

International Symposium on Circuits and Systems

DOI

2023

An Efficient Ring Oscillator PUF Using Programmable Delay Units on FPGA

ACM Trans. Design Autom. Electr. Syst.

DOI

2023

Security and Approximation: Vulnerabilities in Approximation-Aware Testing

IEEE Transactions on Emerging Topics in Computing

DOI

2023

High Performance and Hardware-Efficient Approximate BPF Decoder for Polar codes

International Symposium on Circuits and Systems

DOI

2023

Exact and Approximate Squarers for Error-Tolerant Applications

IEEE transactions on computers

DOI

2023

Approximate Softmax Functions for Energy-Efficient Deep Neural Networks

IEEE Transactions on Very Large Scale Integration (vlsi) Systems

DOI

2023

Design of High Hardware Efficiency Approximate Floating-Point FFT Processor

IEEE Transactions on Circuits and Systems Part 1: Regular Papers

DOI

2023

Novel Intrinsic Physical Unclonable Function Design for Post-quantum Cryptography

International Symposium on Circuits and Systems

DOI

2023

A Novel Method Against Hardware Trojans in Approximate Circuits

IEEE International Symposium on Quality Electronic Design

DOI

2023

ENAP: An Efficient Number-Aware Pruning Framework for Design Space Exploration of Approximate Configurations

IEEE Transactions on Circuits and Systems Part 1: Regular Papers

DOI

2023

An RRAM-based PUF with Adjustable Programmable Voltage and Multi-Mode Operation

DOI

2023

High-efficiency and high-security emerging computing chips: development, challenges, and prospects

Scientia Sinica Informationis

DOI

2023

Fully Learnable Hyperdimensional Computing Framework With Ultratiny Accelerator for Edge-Side Applications

IEEE Transactions on Computers

DOI

2023

An Energy-efficient Approximate DCT Design for Image Processing (Invited)

IEEE International Conference on ASIC (ASICON)

DOI

2023

ActiveGuard: An active intellectual property protection technique for deep neural networks by leveraging adversarial examples as users' fingerprints

IET Computers & Digital Techniques

DOI

2023

An Energy-Efficient Computing-in-Memory (CiM) Scheme Using Field-Free Spin-Orbit Torque (SOT) Magnetic RAMs

IEEE Transactions on Emerging Topics in Computing

DOI

2023

High-Performance STT-MRAM-Based Computing-in-Memory Scheme Utilizing Data Read Feature

IEEE Transactions on Nanotechnology

DOI

2022

Ultra High-Speed Polynomial Multiplications for Lattice-Based Cryptography on FPGAs

IEEE Transactions on Emerging Topics in Computing

DOI

2022

Design and analysis of energy‐efficient approximate Booth‐folding squarers with precision recovery

Electronics Letters

DOI

2022

Security Vulnerabilities and Countermeasures for Approximate Circuits

Approximate Computing

DOI

2022

Low-Power Approximate RPR Scheme for Unsigned Integer Arithmetic Computation

IEEE Open Journal of Nanotechnology

DOI

2022

Low-Power k Nearest Neighbors Classifiers with Approximate Nanoscale Memories

2022 IEEE 22nd International Conference on Nanotechnology (NANO)

DOI

2022

Architectural-Space Exploration of Energy-Efficient Approximate Arithmetic Units for Error-Tolerant Applications

IEEE Computer Society Annual Symposium on VLSI

DOI

2022

A survey of approximate arithmetic circuits and blocks

it - Information Technology

DOI

2022

Majority Logic-Based Approximate Multipliers for Error-Tolerant Applications

Approximate Computing

DOI

2022

Design of Majority Logic-Based Approximate Booth Multipliers for Error-Tolerant Applications

IEEE transactions on nanotechnology

DOI

2022

Majority Logic-based Approximate Recording Adders for High-radix Booth Multipliers

2022 IEEE 22nd International Conference on Nanotechnology (NANO)

DOI

2022

An Automated Logic-Level Framework for Approximate Modular Arithmetic Circuits

Approximate Computing

DOI

2022

PAxC: A Probabilistic-oriented Approximate Computing Methodology for ANNs

Design, Automation and Test in Europe

DOI

2022

Deep Learning-Based Hardware Trojan Detection With Block-Based Netlist Information Extraction

IEEE Transactions on Emerging Topics in Computing

DOI

2022

Hybrid Partial Product-Based High-Performance Approximate Recursive Multipliers

IEEE Transactions on Emerging Topics in Computing

DOI

2022

An Energy-efficient and High-precision Approximate MAC with Distributed Arithmetic Circuits

ACM Great Lakes Symposium on VLSI

DOI

2022

More is Less: Domain-Specific Speech Recognition Microprocessor Using One-Dimensional Convolutional Recurrent Neural Network

IEEE Transactions on Circuits and Systems Part 1: Regular Papers

DOI

2022

Data Stream Oriented Fine-grained Sparse CNN Accelerator with Efficient Unstructured Pruning Strategy

ACM Great Lakes Symposium on VLSI

DOI

2022

A Fully Configurable PUF Using Dynamic Variations of Resistive Crossbar Arrays

IEEE transactions on nanotechnology

DOI

2022

Design of Unsigned Approximate Hybrid Dividers Based on Restoring Array and Logarithmic Dividers

IEEE Transactions on Emerging Topics in Computing

DOI

2022

A Novel Combined Correlation Power Analysis (CPA) Attack on Schoolbook Polynomial Multiplication in Lattice-based Cryptosystems

ACM Symposium on Cloud Computing

DOI

2022

Design of Approximate Floating-point FFT with Mantissa Bit-width Adjustment Algorithm

Asia Pacific Conference on Circuits and Systems

DOI

2022

Efficient Design of Majority-Logic-Based Approximate Arithmetic Circuits

IEEE Transactions on Very Large Scale Integration (vlsi) Systems

DOI

2022

A High Performance SIKE Accelerator With High Frequency and Low Area-Time Product

IEEE Transactions on Circuits and Systems - II - Express Briefs

DOI

2022

Horizontal Correlation Analysis without Precise Location on Schoolbook Polynomial Multiplication of Lattice-based Cryptosystem

International Symposium on Circuits and Systems

DOI

2022

Better Security Estimates for Approximate, IoT-Friendly R-LWE Cryptosystems

Asia Pacific Conference on Circuits and Systems

DOI

2022

Lightweight and Efficient Hardware Implementation for Saber Using NTT Multiplication

Asia Pacific Conference on Circuits and Systems

DOI

2022

AxRLWE: A Multilevel Approximate Ring-LWE Co-Processor for Lightweight IoT Applications

IEEE Internet of Things Journal

DOI

2022

A High-Performance SIKE Hardware Accelerator

IEEE Transactions on Very Large Scale Integration (vlsi) Systems

DOI

2022

Efficient Pipelining Exploration for A High-performance CRYSTALS-Kyber Accelerator

IACR Cryptology ePrint Archive

2022

Approximate Computing [Guest Editorial]

IEEE Nanotechnology Magazine

DOI

2022

A High-Speed CNN Hardware Accelerator with Regular Pruning

IEEE International Symposium on Quality Electronic Design

DOI

2022

A Lightweight and Efficient Schoolbook Polynomial Multiplier for Saber

International Symposium on Circuits and Systems

DOI

2022

A Generic Dynamic Responding Mechanism and Secure Authentication Protocol for Strong PUFs

IEEE Transactions on Very Large Scale Integration (vlsi) Systems

DOI

2022

HEADiv: A High-accuracy Energy-efficient Approximate Divider with Error Compensation

DOI

2022

Capacity-oriented High-performance NV-TCAM Leveraging Hybrid MRAM Scheme

DOI

2022

Low-cost stochastic number generator based on MRAM for stochastic computing

DOI

2022

High-performance STT-MRAM Logic-in-Memory Scheme Utilizing Data Read Features

DOI

2021

基于MLWE的格密码高效硬件实现

《信息安全学报》

DOI

2021

AxBMs: Approximate Radix-8 Booth Multipliers for High-Performance FPGA-Based Accelerators

IEEE Transactions on Circuits and Systems - II - Express Briefs

DOI

2021

Background Calibration for Bit Weights in Pipelined ADCs Using Adaptive Dither Windows

IEEE Transactions on Circuits and Systems - II - Express Briefs

DOI

2021

Stochastic Dividers for Low Latency Neural Networks

IEEE Transactions on Circuits and Systems Part 1: Regular Papers

DOI

2021

A 2-Then-1 Bit/Cycle Asynchronous SAR ADC with Background Offset Calibration

International Symposium on Circuits and Systems

DOI

2021

High Performance CNN Accelerators Based on Hardware and Algorithm Co-Optimization

IEEE Transactions on Circuits and Systems Part 1: Regular Papers

DOI

2021

An Efficient High SFDR PDDS Using High-Pass-Shaped Phase Dithering

IEEE Transactions on Very Large Scale Integration (vlsi) Systems

DOI

2021

Dynamically Configurable Physical Unclonable Function based on RRAM Crossbar

IEEE/ACM International Symposium on Nanoscale Architectures

DOI

2021

An Energy Efficient Accelerator for Bidirectional Recurrent Neural Networks (BiRNNs) Using Hybrid-Iterative Compression With Error Sensitivity

IEEE Transactions on Circuits and Systems Part 1: Regular Papers

DOI

2021

High-Performance Systolic Array Montgomery Multiplier for SIKE

International Symposium on Circuits and Systems

DOI

2021

AxRMs: Approximate Recursive Multipliers Using High-Performance Building Blocks

IEEE Transactions on Emerging Topics in Computing

DOI

2021

Design and analysis of hardware Trojans in approximate circuits

Electronics Letters

DOI

2021

A Hardware/Software Co-Design Methodology for Adaptive Approximate Computing in clustering and ANN Learning

IEEE Open Journal of the Computer Society

DOI

2021

A lightweight key renewal scheme based authentication protocol with configurable RO PUF for clustered sensor networks

Microelectronics Journal

DOI

2021

A Real-Time Hardware Emulator for 3D Non-Stationary U2V Channels

IEEE Transactions on Circuits and Systems Part 1: Regular Papers

DOI

2021

A 10-b 500MS/s Partially Loop-Unrolled SAR ADC with a Comparator Offset Calibration Technique

International Symposium on Circuits and Systems

DOI

2021

A Physical Unclonable Function Using a Configurable Tristate Hybrid Scheme With Non-Volatile Memory

IEEE Open Journal of Nanotechnology

DOI

2021

A Dynamically Configurable PUF and Dynamic Matching Authentication Protocol

IEEE Transactions on Emerging Topics in Computing

DOI

2021

APAS: Application-Specific Accelerators for RLWE-Based Homomorphic Linear Transformations

IEEE Transactions on Information Forensics and Security

DOI

2021

Precision Adaptive MFCC Based on R2SDF-FFT and Approximate Computing for Low-Power Speech Keywords Recognition

IEEE Circuits and Systems Magazine

DOI

2021

A Dynamic Highly Reliable SRAM-Based PUF Retaining Memory Function

International Symposium on Circuits and Systems

DOI

2021

GOMIL: Global Optimization of Multiplier by Integer Linear Programming

Design, Automation and Test in Europe

DOI

2021

Design of An Approximate FFT Processor Based on Approximate Complex Multipliers

IEEE Computer Society Annual Symposium on VLSI

DOI

2021

Towards CRYSTALS-Kyber: A M-LWE Cryptoprocessor with Area-Time Trade-Off

International Symposium on Circuits and Systems

DOI

2021

DNN Intellectual Property Protection

ACM Great Lakes Symposium on VLSI (GLSVLSI)

DOI

2020

Transformer PUF : A Highly Flexible Configurable RO PUF Based on FPGA

IEEE Workshop on Signal Processing Systems

DOI

2020

Lightweight Modeling Attack-Resistant Multiplexer-Based Multi-PUF (MMPUF) Design on FPGA

Electronics

DOI

2020

Approximate Computing: From Circuits to Applications [Scanning the Issue]

Proceedings of the IEEE

DOI

2020

A Retrospective and Prospective View of Approximate Computing [Point of View}

Proceedings of the IEEE

DOI

2020

Resource-Shared Crypto-Coprocessor of AES Enc/Dec With SHA-3

IEEE Transactions on Circuits and Systems Part 1: Regular Papers

DOI

2020

DC-LSTM: Deep Compressed LSTM with Low Bit-Width and Structured Matrices

International Symposium on Circuits and Systems

DOI

2020

Design and Analysis of Energy-Efficient Dynamic Range Approximate Logarithmic Multipliers for Machine Learning

IEEE Transactions on Sustainable Computing

DOI

2020

Security in Approximate Computing and Approximate Computing for Security: Challenges and Opportunities

Proceedings of the IEEE

DOI

2020

An Efficient and Parallel R-LWE Cryptoprocessor

IEEE Transactions on Circuits and Systems - II - Express Briefs

DOI

2020

Hybrid Low Radix Encoding-Based Approximate Booth Multipliers

IEEE Transactions on Circuits and Systems - II - Express Briefs

DOI

2020

AxSA: On the Design of High-Performance and Power-Efficient Approximate Systolic Arrays for Matrix Multiplication

Journal of Signal Processing Systems

DOI

2020

Design, evaluation and application of approximate-truncated Booth multipliers

IET Circuits Devices Syst.

DOI

2020

BCD Adder Designs Based on Three-Input XOR and Majority Gates

IEEE Transactions on Circuits and Systems - II - Express Briefs

DOI

2020

Design and Implementation of an Approximate Softmax Layer for Deep Neural Networks

International Symposium on Circuits and Systems

DOI

2020

Guest Editorial: Introduction to the Special Section on Cyber Security Threats and Defense Advance

IEEE Transactions on Emerging Topics in Computing

DOI

2020

Programmable Ring Oscillator PUF Based on Switch Matrix

International Symposium on Circuits and Systems

DOI

2020

Lightweight Configurable Ring Oscillator PUF Based on RRAM/CMOS Hybrid Circuits

IEEE Open Journal of Nanotechnology

DOI

2020

A Modeling Attack Resistant Deception Technique for Securing Lightweight-PUF-Based Authentication

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

DOI

2020

Profile-Based Output Error Compensation for Approximate Arithmetic Circuits

IEEE Transactions on Circuits and Systems Part 1: Regular Papers

DOI

2020

Mathematical Modeling Analysis of Strong Physical Unclonable Functions

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

DOI

2020

Ten years of hardware Trojans: a survey from the attacker's perspective

IET Computers & Digital Techniques

DOI

2020

Security Analysis of Hardware Trojans on Approximate Circuits

ACM Great Lakes Symposium on VLSI

DOI

2020

A Novel Feature Extraction Strategy for Hardware Trojan Detection

International Symposium on Circuits and Systems

DOI

2020

High Performance Modular Multiplication for SIDH

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

DOI

2020

AxMM: Area and Power Efficient Approximate Modular Multiplier for R-LWE Cryptosystem

International Symposium on Circuits and Systems

DOI

2020

Embedding Backdoors as the Facial Features

ACM Turing Celebration Conference - China (ACM TURC)

DOI

2019

一种高性能R-LWE格加密算法的电路结构及其FPGA实现

《数据采集与处理》

2019

基于FPGA的CCSDS自适应传输系统

《数据采集与处理》

DOI

2019

A Flip-Flop Based Arbiter Physical Unclonable Function (APUF) Design with High Entropy and Uniqueness for FPGA Implementation

IEEE Transactions on Emerging Topics in Computing

DOI

2019

Dynamic Reconfigurable PUFs Based on FPGA

IEEE Workshop on Signal Processing Systems

DOI

2019

A large-scale comprehensive evaluation of single-slice ring oscillator and PicoPUF bit cells on 28-nm Xilinx FPGAs

Journal of Cryptographic Engineering

DOI

2019

New Majority Gate-Based Parallel BCD Adder Designs for Quantum-Dot Cellular Automata

IEEE Transactions on Circuits and Systems - II - Express Briefs

DOI

2019

INA: Incremental Network Approximation Algorithm for Limited Precision Deep Neural Networks

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)

DOI

2019

Theoretical Analysis of Configurable RO PUFs and Strategies to Enhance Security

IEEE Workshop on Signal Processing Systems

DOI

2019

Optimized Modular Multiplication for Supersingular Isogeny Diffie-Hellman

IEEE transactions on computers

DOI

2019

Design and Evaluation of a Power-Efficient Approximate Systolic Array Architecture for Matrix Multiplication

IEEE Workshop on Signal Processing Systems

DOI

2019

High-performance approximate half and full adder cells using NAND logic gate

IEICE Electronics Express

DOI

2019

Design and Analysis of Approximate Redundant Binary Multipliers

IEEE transactions on computers

DOI

2019

Security Analysis and Modeling Attacks on Duty Cycle Multiplexer PUF

International Conference on ASIC

DOI

2019

Reduced Precision Redundancy for Reliable Processing of Data

IEEE Transactions on Emerging Topics in Computing

DOI

2019

Multi-Incentive Delay-Based (MID) PUF

International Symposium on Circuits and Systems

DOI

2019

A Theoretical Model to Link Uniqueness and Min-Entropy for PUF Evaluations

IEEE transactions on computers

DOI

2019

An Improved Automatic Hardware Trojan Generation Platform

IEEE Computer Society Annual Symposium on VLSI

DOI

2019

A Modeling Attack Resistant Deception Technique for Securing PUF based Authentication

Asian Hardware-Oriented Security and Trust Symposium

DOI

2019

Design and Analysis of Majority Logic Based Approximate Radix-4 Booth Encoders

IEEE/ACM International Symposium on Nanoscale Architectures

DOI

2019

Design and Analysis of Majority Logic-Based Approximate Adders and Multipliers

IEEE Transactions on Emerging Topics in Computing

DOI

2019

Lattice-based Cryptography for IoT in A Quantum World: Are We Ready?

International Workshop on Advances in Sensors and Interfaces

DOI

2019

Theoretical Analysis of Delay-Based PUFs and Design Strategies for Improvement

International Symposium on Circuits and Systems

DOI

2019

XOR-Based Low-Cost Reconfigurable PUFs for IoT Security

ACM Transactions on Embedded Computing Systems

DOI

2019

Approximate Designs for Fast Fourier Transform (FFT) With Application to Speech Recognition

IEEE Transactions on Circuits and Systems Part 1: Regular Papers

DOI

2019

Building an accurate hardware Trojan detection technique from inaccurate simulation models and unlabelled ICs

IET Computers & Digital Techniques

DOI

2018

面向可容错计算的近似Booth乘法器设计

《微电子学与计算机》

DOI

2018

A Highly Flexible Lightweight and High Speed True Random Number Generator on FPGA

IEEE Computer Society Annual Symposium on VLSI

DOI

2018

A machine learning attack resistant multi-PUF design on FPGA

Asia and South Pacific Design Automation Conference

DOI

2018

Design of Approximate FFT with Bit-width Selection Algorithms

International Symposium on Circuits and Systems

DOI

2018

Design of Dynamic Range Approximate Logarithmic Multipliers

ACM Great Lakes Symposium on VLSI

DOI

2018

Lightweight Hardware Implementation of R-LWE Lattice-Based Cryptography

Asia Pacific Conference on Circuits and Systems

DOI

2018

Design and Application of an Approximate 2-D Convolver with Error Compensation

International Symposium on Circuits and Systems

DOI

2018

Design of Majority Logic (ML) Based Approximate Full Adders

International Symposium on Circuits and Systems

DOI

2018

Modelling Attack Analysis of Configurable Ring Oscillator (CRO) PUF Designs

International Conference on Digital Signal Processing

DOI

2018

A Probabilistic Error Model and Framework for Approximate Booth Multipliers

IEEE/ACM International Symposium on Nanoscale Architectures

DOI

2018

Attacking Arbiter PUFs Using Various Modeling Attack Algorithms: A Comparative Study

Asia Pacific Conference on Circuits and Systems

DOI

2018

Combining Restoring Array and Logarithmic Dividers into an Approximate Hybrid Design

IEEE Symposium on Computer Arithmetic

DOI

2018

Design, Evaluation and Application of Approximate High-Radix Dividers

IEEE Transactions on Multi-Scale Computing Systems

DOI

2018

Error Samplers for Lattice-Based Cryptography -Challenges, Vulnerabilities and Solutions

Asia Pacific Conference on Circuits and Systems

DOI

2018

A Hardware/Software Co-design Method for Approximate Semi-Supervised K-Means Clustering

IEEE Computer Society Annual Symposium on VLSI

DOI

2018

Design and Evaluation of Approximate Logarithmic Multipliers for Low Power Error-Tolerant Applications

IEEE Transactions on Circuits and Systems Part 1: Regular Papers

DOI

2018

Design and Optimization of Modular Multiplication for SIDH

International Symposium on Circuits and Systems

DOI

2018

Data Compression Device Based on Modified LZ4 Algorithm

IEEE transactions on consumer electronics

DOI

2018

Design Exploration of Small Bit-Width Multipliers Using Approximate Logic Design (ALD) Tool

International Conference on Digital Signal Processing

DOI

2018

Ultra-Lightweight and Reconfigurable Tristate Inverter Based Physical Unclonable Function Design

IEEE Access

DOI

2018

Approximate Computing and Its Application to Hardware Security

Cyber-Physical Systems Security

DOI

2017

Designs of Approximate Floating-Point Multipliers with Variable Accuracy for Error-Tolerant Applications

Journal of Signal Processing Systems

DOI

2017

XOR gate based low-cost configurable RO PUF

International Symposium on Circuits and Systems

DOI

2017

Design of High-Speed Wide-Word Hybrid Parallel-Prefix/Carry-Select and Skip Adders

Journal of Signal Processing Systems

DOI

2017

High Performance Parallel Decimal Multipliers Using Hybrid BCD Codes

IEEE transactions on computers

DOI

2017

Design of Approximate High-Radix Dividers by Inexact Binary Signed-Digit Addition

ACM Great Lakes Symposium on VLSI

DOI

2017

Algorithm and Design of a Fully Parallel Approximate Coordinate Rotation Digital Computer (CORDIC)

IEEE Transactions on Multi-Scale Computing Systems

DOI

2017

Multiprecision Multiplication on ARMv8

IEEE Symposium on Computer Arithmetic

DOI

2017

Design of Approximate Logarithmic Multipliers

ACM Great Lakes Symposium on VLSI

DOI

2017

Guest Editorial: Introduction to the Special Issue on Emerging Technologies and Designs for Application-Specific Computing

IEEE Transactions on Emerging Topics in Computing

DOI

2017

DC MUX PUF: A highly reliable feed-back MUX PUF based on measuring duty cycle

International Conference on ASIC

DOI

2017

Design of Approximate Radix-4 Booth Multipliers for Error-Tolerant Computing

IEEE transactions on computers

DOI

2017

Design and operational assessment of an intra-cell hybrid L2 cache

IEEE/ACM International Symposium on Nanoscale Architectures

DOI

2017

Application of LDPC codes on PUF error correction based on code-offset construction

International Conference on ASIC

DOI

2016

一种低成本物理不可克隆函数结构的设计实现及其RFID应用

《电子学报》

2016

A Parallel Decimal Multiplier Using Hybrid Binary Coded Decimal (BCD) Codes

IEEE Symposium on Computer Arithmetic

DOI

2016

Design and Performance Evaluation of Approximate Floating-Point Multipliers

IEEE Computer Society Annual Symposium on VLSI

DOI

2016

A Modified Partial Product Generator for Redundant Binary Multipliers

IEEE transactions on computers

DOI

2016

On the Design of Approximate Restoring Dividers for Error-Tolerant Applications

IEEE transactions on computers

DOI

2016

Design and evaluation of an approximate Wallace-Booth multiplier

International Symposium on Circuits and Systems

DOI

2016

A fully parallel approximate CORDIC design

IEEE/ACM International Symposium on Nanoscale Architectures

DOI

2016

Design and Analysis of Inexact Floating-Point Adders

IEEE transactions on computers

DOI

2016

Low-cost configurable ring oscillator PUF with improved uniqueness

International Symposium on Circuits and Systems

DOI

2016

Live demonstration: An automatic evaluation platform for physical unclonable function test

International Symposium on Circuits and Systems

DOI

2016

A Reconfigurable Memory PUF Based on Tristate Inverter Arrays

IEEE Workshop on Signal Processing Systems

DOI

2016

Design of approximate Redundant Binary multipliers

IEEE/ACM International Symposium on Nanoscale Architectures

DOI

2015

RO PUF design in FPGAs with new comparison strategies

International Symposium on Circuits and Systems

DOI

2015

Design of Approximate Unsigned Integer Non-restoring Divider for Inexact Computing

ACM Great Lakes Symposium on VLSI

DOI

2015

Improving RO PUF design using frequency distribution characteristics

IEICE Electronics Express

DOI

2015

Design of 3-D quantum-dot cellular automata adders

IEICE Electronics Express

DOI

2014

Inexact floating-point adder for dynamic image processing

IEEE International Conference on Nanotechnology

DOI

2014

Bit erasure analysis of binary adders in Quantum-dot Cellular Automata

IEEE International Conference on Nanotechnology

DOI

2014

A First Step Toward Cost Functions for Quantum-Dot Cellular Automata Designs

IEEE transactions on nanotechnology

DOI

2014

Security Issues in QCA Circuit Design - Power Analysis Attacks

Field-Coupled Nanocomputing

DOI

2013

Design of Semiconductor QCA Systems

2013

Power analysis attack of QCA circuits: A case study of the Serpent cipher

International Symposium on Circuits and Systems

DOI

2013

QCA Systolic Array Design

IEEE transactions on computers

DOI

2013

2 Quantum-dot Cellular Automata

2013

Security Issues in QCA Circuit Design – Power Analysis Attacks•Liu, W, Srivastava, S, O’Neill, M, Swartzlander, E.E, Security Issues in QCA Circuit Design – Power Analysis Attacks, Book chapter in Field-Coupled Nanocomputing, Springer LNCS 8280, pp 194-222, September 2013.

Research Portal (Queen's University Belfast)

2012

A review of QCA adders and metrics

Asilomar Conference on Signals, Systems and Computers

DOI

2012

Are QCA cryptographic circuits resistant to power analysis attack?

IEEE transactions on nanotechnology

DOI

2012

Cost-efficient decimal adder design in Quantum-dot cellular automata

2012 IEEE International Symposium on Circuits and Systems

DOI

2011

Design of quantum-dot cellular automata circuits using cut-set retiming

IEEE transactions on nanotechnology

DOI

2011

Design rules for Quantum-dot Cellular Automata

International Symposium on Circuits and Systems

DOI

2010

QCA Systolic Matrix Multiplier

IEEE Computer Society Annual Symposium on VLSI

DOI

2010

Montgomery modular multiplier design in quantum-dot cellular automata using cut-set retiming

IEEE International Conference on Nanotechnology

DOI

2024

Progressive Approximation-Aware Training with Regularization and Transfer Learning for DNN Acceleration

DOI

2022

Approximate Arithmetic Circuits: Design and Applications

Springer eBooks

DOI