蒋春生｜广西师范大学｜学者主页

2026

Fabrication and Temperature Behavior of Amorphous Indium Tungsten Oxide Thin Film Transistors

Chen Xia, Ren-Rong Liang, Zhi-Qiang Wei, Ya-Lu Chen, Bingjun Cao, Ziyi Liu, Yiwei Du, Jun Xu, Chunsheng Jiang, Libin Liu

IEEE Electron Devices Technology and Manufacturing Conference

DOI

2026

Effect of alloying at different lattice sites on the electronic structure regulation of BaTiO3 and evaluation of its alloying feasibility

Zhihao Zhuo, Dan Huang, Xingpeng Liu, Chunsheng Jiang, Haiou Li

Computational Condensed Matter

DOI

2026

Mechanism and Performance Verification of Channel-Hot-Electron Induced Hot-Hole Injection-Based High-Speed Erasure for Split-Gate Charge-Trapping Flash Memory

Zhexuan Li, Xiao Yu, Chunsheng Jiang, Dianyu Qi, Xuan Li, Zhendong Shi, Kun Ren, Dawei Gao, Liyang Pan

IEEE Transactions on Electron Devices

DOI

2025

基于原子阈值开关的二维沟道材料场效应晶体管解析模型研究

蒋春生，霍亦康，化麒麟，宋树祥，潘立阳，许军

《电子学报》

2025

“新工科”理念下地方院校集成电路人才培养模式改革与实践

蒋春生，谢琴

《科技风》

DOI

2025

新型超陡亚阈值斜率晶体管 = Novel Super-steep subthreshold slope transistors

蒋春生

《人民邮电出版社》

2025

新质生产力视角下“半导体工艺原理”课程教学改革路径探析

蒋春生，谢琴

《科技风》

DOI

2025

新工科个性化人才培养模式下“嵌入式系统原理与应用”课程教学改革与实践

卢宝山，刘俊秀，苏珉，朱红艳，蒋春生

《科技风》

DOI

2025

Threshold-Switching Memristors for Neuromorphic Thermoreception

Haotian Li, Chunsheng Jiang, Qilin Hua

Italian National Conference on Sensors

DOI

2025

Modeling of the Switching Characteristics of Ag/HfO2-Based Volatile Memristors

Yikang Huo, Chunsheng Jiang, Qin Xie

IEEE Electron Devices Technology and Manufacturing Conference

DOI

2025

An Analytical I-V model for GAA Junctionless MOSFETs Including Interface Trap Charges

Chunsheng Jiang, Yue Qi, Qin Xie

European Conference on Information Systems

DOI

2024

Adaptive In‐Sensor Computing for Enhanced Feature Perception and Broadband Image Restoration

He Shao, Wei-Jun Wang, Yuxuan Zhang, Bo-Xiang Gao, Chunsheng Jiang, Yezhan Li, Peng-Shan Xie, Yan Yan, Yi Shen, Zeng-Hui Wu, Ruiheng Wang, Yu Ji, Hai-Feng Ling, Wei Huang, J. C. Ho

Advances in Materials

DOI

2024

Artificial synapse based on a tri-layer AlN/AlScN/AlN stacked memristor for neuromorphic computing

Xinhuan Dai, Qilin Hua, Chunsheng Jiang, Yong-Chien Long, Zilong Dong, Yuan-Hong Shi, Tianci Huang, Haotian Li, Haixing Meng, Yang Yang, Rui-Lai Wei, Guozhen Shen, Weiguo Hu

Nano Energy

DOI

2024

Fabrication and Electrical Characterization of Mo/HfxZrl-xO2/Mo Ferroelectric Capacitors

Chunsheng Jiang, Wen-Cai Du, Qin Xie

IEEE International Conference on Solid-State and Integrated Circuit Technology

DOI

2024

A Novel Dual-Bit Charge Trapping Flash Cell with Operation Optimization for Standalone and Embedded Universal Applications

Zhexuan Li, Xiaopeng Yu, Kun Ren, Dianyu Qi, Chunsheng Jiang, Zhengdong Shi, Yongyu Wu, Guangji Li, Yunhao Zhang, Zhiqiang Su, Jun Xu, Dawei Gao, Liyang Pan

Technical digest - International Electron Devices Meeting/Technical digest

DOI

2024

A Flexible Hf 0.5 Zr 0.5 O 2 Nonvolatile Memory with High Polarization Based on Mica Substrate

Xingpeng Liu, Chunshu Wei, Fabi Zhang, Ying Peng, Tangyou Sun, Yiming Peng, Huiping Tang, Junfeng Yang, Mingjian Ding, Chunsheng Jiang, Haiou Li

ACS Applied Electronic Materials

DOI

2024

Compact modeling of short-channel effects in back-gated 2D negative capacitance (NC) FETs

Chunsheng Jiang, Qing Lu, Liyang Pan, Quanfu Li, Huiling Peng, Zhigang Zhang, Shuxiang Song, Jun Xu

Journal of Physics D Applied Physics

DOI

2024

The Study of Hysteretic Characteristics of FeFETs for Neuromorphic Computing Using a Closed-Form Analytical Model

Chunsheng Jiang, Hongying Chen, Liyang Pan, Quanfu Li, Huiling Peng, Qi Hu, Shuxiang Song, Jun Xu

IEEE Transactions on Electron Devices

DOI

2023

A Continuous and Closed-Form Trans-Capacitance Model for Double-Gate Junctionless Transistors

Xingchen Xin, Chunsheng Jiang, Hongying Chen

IEEE International Conference on ASIC (ASICON)

DOI

2023

Low‐Fluence Neutron Irradiation Effects on AlGaN/GaN HEMTs

Xiao Yong Cui, Keyu Ji, Taiping Zhang, Bingjun Wang, Wei Sha, Zilong Dong, Yuanhong Shi, Chunsheng Jiang, Qilin Hua, Weiguo Hu

Advanced Materials Technologies

DOI

2022

大数据背景下工科教师提升课程思政教学能力的实践与探索

陈璟，蒋春生，冯丹丹，古志华

《产业与科技论坛》

2022

A closed form analytical model for threshold switching mechanism of chalcogenide-based devices

Chunsheng Jiang, Xingchen Xin, Hong-Ying Chen

Symposium on Novel Photoelectronic Detection Technology and Application

DOI

2021

PDSOI NMOS器件激光模拟光电流效应

任尚清，王博博，蒋春生，钟乐，孙鹏，解磊

《太赫兹科学与电子信息学报》

2021

Ag/HfO2-based Threshold Switching Memristor as an Oscillatory Neuron

Qi-Lin Hua, Chunsheng Jiang, Weiguo Hu

IEEE Electron Devices Technology and Manufacturing Conference

DOI

2020

Improved Performance of SRAM-Based True Random Number Generator by Leveraging Irradiation Exposure

Xu Zhang, Chunsheng Jiang, Gang Dai, L. Zhong, Wen Fang, Ke Gu, Guo-Ping Xiao, Shang-Qing Ren, Xin Liu, Sanyong Zou

Italian National Conference on Sensors

DOI

2020

A Novel SRAM PUF Stability Improvement Method Using Ionization Irradiation

Xu Zhang, Chunsheng Jiang, Ke Gu, L. Zhong, Wen Fang, Gang Dai

DOI

2020

Atomic threshold-switching enabled MoS2 transistors towards ultralow-power electronics

Qi-Lin Hua, Guoyun Gao, Chunsheng Jiang, Jin-Ran Yu, Junlu Sun, Taiping Zhang, Bin Gao, Weijun Cheng, R. Liang, He Qian, Weiguo Hu, Qi-Jun Sun, Zhong-Lin Wang, Hua-Qiang Wu

Nature Communications

DOI

2019

Proton Conductor Gated Synaptic Transistor Based on Transparent IGZO for Realizing Electrical and UV Light Stimulus

Weijun Cheng, R. Liang, H. Tian, Chuanchuan Sun, Chunsheng Jiang, Xia-Wa Wang, Jing Wang, T. Ren, Jun Xu

IEEE Journal of the Electron Devices Society

DOI

2019

Logic “AND” and “OR” realized in a single intelligent three dimension transistor

Yu Liu, Linyuan Zhao, Jun-Xiong Guo, Chunsheng Jiang, Weijun Cheng, Wen-Jie Chen, T. Ren, Jun Xu

Applied Physics Express

DOI

2019

Impact of Interface Trap Charges on the Electrical Characteristics of Back-Gated 2D Negative Capacitance (NC) FET

Chunsheng Jiang, L. Zhong, Lei Xie

IEEE transactions on nanotechnology

DOI

2019

Negative Capacitance Oxide Thin-Film Transistor With Sub-60 mV/Decade Subthreshold Swing

Yuxing Li, R. Liang, Jia-Bin Wang, Chunsheng Jiang, Benkuan Xiong, Hou-Fang Liu, Zhi-Bo Wang, Xue-Feng Wang, Yu Pang, H. Tian, Yi Yang, T. Ren

IEEE Electron Device Letters

DOI

2019

Effects of interface trap charges on the electrical characteristics of back-gated 2D Negative Capacitance FET

Chunsheng Jiang, L. Zhong, Lei Xie

2019 IEEE 19th International Conference on Nanotechnology (IEEE-NANO)

DOI

2018

Effects of parasitic capacitance on both static and dynamic electrical characteristics of back-gated two-dimensional semiconductor negative-capacitance field-effect transistors

Chunsheng Jiang, R. Liang, L. Zhong, Lei Xie, Weijun Cheng, Jun Xu

Applied Physics Express

DOI

2018

Steep-Slope WSe2 Negative Capacitance Field-Effect Transistor.

M. Si, Chunsheng Jiang, Wonil Chung, Yu-Chen Du, M. A. Alam, P. Ye

Nano letters (Print)

DOI

2018

A Closed Form Analytical Model of Back-Gated 2-D Semiconductor Negative Capacitance Field Effect Transistors

Chunsheng Jiang, M. Si, R. Liang, Jun Xu, P. Ye, M. A. Alam

IEEE Journal of the Electron Devices Society

DOI

2018

MoS2 Negative‐Capacitance Field‐Effect Transistors with Subthreshold Swing below the Physics Limit

Xing-Qiang Liu, R. Liang, Guoyun Gao, Cao-Feng Pan, Chunsheng Jiang, Qian Xu, Jun Luo, Xu-Ming Zou, Zhen-Yu Yang, L. Liao, Zhong-Lin Wang

Advances in Materials

DOI

2018

Integrated modeling of Self-heating of confined geometry (FinFET, NWFET, and NSHFET) transistors and its implications for the reliability of sub-20 nm modern integrated circuits

W. Ahn, Sanghoon Shin, Chunsheng Jiang, Hai Jiang, M. A. Wahab, M. A. Alam

Microelectronics and reliability

DOI

2017

A new framework of physics-based compact model predicts reliability of self-heated modern ICs: FinFET, NWFET, NSHFET comparison

W. Ahn, Chunsheng Jiang, Jun Xu, M. A. Alam

International Electron Devices Meeting

DOI

2017

An analytical charge-sheet drain current model for monolayer transition metal dichalcogenide negative capacitance field-effect transistors

R. Liang, Chunsheng Jiang, Jing Wang, Jun Xu, T. Ren

IEEE Electron Devices Technology and Manufacturing Conference

DOI

2017

Steep Slope MoS2 2D Transistors: Negative Capacitance and Negative Differential Resistance

M. Si, Chun-Jung Su, Chunsheng Jiang, N. Conrad, Hong Zhou, K. Maize, G. Qiu, Chien-Ting Wu, A. Shakouri, M. A. Alam, P. Ye

2017

数値シミュレーションと解析的モデリングの結合負性静電容量全周囲ゲートトンネルFETの研究【Powered by NICT】

Chunsheng Jiang, Ren-Rong Liang, Jun Xu

2017

A Compact Quasi-Static Terminal Charge and Drain Current Model for Double-Gate Junctionless Transistors and Its Circuit Validation

Chunsheng Jiang, R. Liang, Jun Xu, M. A. Alam

IEEE Transactions on Electron Devices

DOI

2017

Stability of MOSFET-Based Electronic Components in Wearable and Implantable Systems

Xin Jin, Chunsheng Jiang, E. Song, Hui Fang, J. Rogers, M. A. Alam

IEEE Transactions on Electron Devices

DOI

2017

Investigation of Negative Capacitance Gate-all-Around Tunnel FETs Combining Numerical Simulation and Analytical Modeling

Chunsheng Jiang, R. Liang, Jun Xu

IEEE transactions on nanotechnology

DOI

2016

Simulation-based study of negative capacitance double-gate junctionless transistors with ferroelectric gate dielectric

Chunsheng Jiang, R. Liang, Jing Wang, Jun Xu

DOI

2016

Subthreshold Behaviors of Nanoscale Silicon and Germanium Junctionless Cylindrical Surrounding-Gate MOSFETs

Chunsheng Jiang, R. Liang, Jing Wang, Jun Xu

DOI

2016

Analytical drain current model for long-channel double-gate negative capacitance junctionless transistors using Landau theory

Chunsheng Jiang, R. Liang, Jing Wang, Jun Xu

International Conference on Electron Devices and Solid-State Circuits

DOI

2016

Analytical drain current model for long-channel gate-all-around negative capacitance transistors with a metal–ferroelectric–insulator–semiconductor structure

Chunsheng Jiang, R. Liang, Jing Wang, Jun Xu

DOI

2015

A two-dimensional analytical model for short channel junctionless double-gate MOSFETs

Chunsheng Jiang, R. Liang, Jing Wang, Jun Xu

DOI

2015

Investigation of line tunnel field effect transistor with Ge/Si heterojunction

Shu-Qin Zhang, Chunsheng Jiang, Libin Liu, Jing Wang, Jun Xu

International Conference on ASIC

DOI

2015

A carrier-based analytic theory for electrical simulation of negative capacitance surrounding gate ferroelectric capacitor

Chunsheng Jiang, R. Liang, Jing Wang, Jun Xu

2015 IEEE 15th International Conference on Nanotechnology (IEEE-NANO)

DOI

2015

A study of subthreshold behavior of short-channel junctionless cylindrical surrounding-gate MOSFETs from an electrostatic potential viewpoint

Chunsheng Jiang, R. Liang, Jing Wang, Jun Xu

International Symposium on Next-Generation Electronics

DOI

2015

A carrier-based analytical theory for negative capacitance symmetric double-gate field effect transistors and its simulation verification

Chunsheng Jiang, R. Liang, Jing Wang, Jun Xu

DOI

2014

A rigorous analytical model for short-channel junctionless double-gate MOSFETs

Chunsheng Jiang, R. Liang, Jing Wang, Jun Xu

IEEE International Conference on Solid-State and Integrated Circuit Technology

DOI

2014

Investigation of the junctionless line tunnel field-effect transistor

Lei Yao, R. Liang, Chunsheng Jiang, Jing Wang, Jun Xu

International Symposium on Next-Generation Electronics

DOI

2014

Analytical short-channel behavior models of Junctionless Cylindrical Surrounding-Gate MOSFETs

Chunsheng Jiang, R. Liang, Jing Wang, Jun Xu

International Symposium on Next-Generation Electronics

DOI

精选作品

期刊论文

Fabrication and Temperature Behavior of Amorphous Indium Tungsten Oxide Thin Film Transistors

Effect of alloying at different lattice sites on the electronic structure regulation of BaTiO3 and evaluation of its alloying feasibility

Mechanism and Performance Verification of Channel-Hot-Electron Induced Hot-Hole Injection-Based High-Speed Erasure for Split-Gate Charge-Trapping Flash Memory

基于原子阈值开关的二维沟道材料场效应晶体管解析模型研究

“新工科”理念下地方院校集成电路人才培养模式改革与实践

新型超陡亚阈值斜率晶体管 = Novel Super-steep subthreshold slope transistors

新质生产力视角下“半导体工艺原理”课程教学改革路径探析

新工科个性化人才培养模式下“嵌入式系统原理与应用”课程教学改革与实践

Threshold-Switching Memristors for Neuromorphic Thermoreception

Modeling of the Switching Characteristics of Ag/HfO2-Based Volatile Memristors

An Analytical I-V model for GAA Junctionless MOSFETs Including Interface Trap Charges

Adaptive In‐Sensor Computing for Enhanced Feature Perception and Broadband Image Restoration

Artificial synapse based on a tri-layer AlN/AlScN/AlN stacked memristor for neuromorphic computing

Fabrication and Electrical Characterization of Mo/HfxZrl-xO2/Mo Ferroelectric Capacitors

A Novel Dual-Bit Charge Trapping Flash Cell with Operation Optimization for Standalone and Embedded Universal Applications

A Flexible Hf 0.5 Zr 0.5 O 2 Nonvolatile Memory with High Polarization Based on Mica Substrate

Compact modeling of short-channel effects in back-gated 2D negative capacitance (NC) FETs

The Study of Hysteretic Characteristics of FeFETs for Neuromorphic Computing Using a Closed-Form Analytical Model

A Continuous and Closed-Form Trans-Capacitance Model for Double-Gate Junctionless Transistors

Low‐Fluence Neutron Irradiation Effects on AlGaN/GaN HEMTs

大数据背景下工科教师提升课程思政教学能力的实践与探索

A closed form analytical model for threshold switching mechanism of chalcogenide-based devices

PDSOI NMOS器件激光模拟光电流效应

Ag/HfO2-based Threshold Switching Memristor as an Oscillatory Neuron

Improved Performance of SRAM-Based True Random Number Generator by Leveraging Irradiation Exposure

A Novel SRAM PUF Stability Improvement Method Using Ionization Irradiation

Atomic threshold-switching enabled MoS2 transistors towards ultralow-power electronics

Proton Conductor Gated Synaptic Transistor Based on Transparent IGZO for Realizing Electrical and UV Light Stimulus

Logic “AND” and “OR” realized in a single intelligent three dimension transistor

Impact of Interface Trap Charges on the Electrical Characteristics of Back-Gated 2D Negative Capacitance (NC) FET

Negative Capacitance Oxide Thin-Film Transistor With Sub-60 mV/Decade Subthreshold Swing

Effects of interface trap charges on the electrical characteristics of back-gated 2D Negative Capacitance FET

Effects of parasitic capacitance on both static and dynamic electrical characteristics of back-gated two-dimensional semiconductor negative-capacitance field-effect transistors

Steep-Slope WSe2 Negative Capacitance Field-Effect Transistor.

A Closed Form Analytical Model of Back-Gated 2-D Semiconductor Negative Capacitance Field Effect Transistors

MoS2 Negative‐Capacitance Field‐Effect Transistors with Subthreshold Swing below the Physics Limit

Integrated modeling of Self-heating of confined geometry (FinFET, NWFET, and NSHFET) transistors and its implications for the reliability of sub-20 nm modern integrated circuits

A new framework of physics-based compact model predicts reliability of self-heated modern ICs: FinFET, NWFET, NSHFET comparison

An analytical charge-sheet drain current model for monolayer transition metal dichalcogenide negative capacitance field-effect transistors

Steep Slope MoS2 2D Transistors: Negative Capacitance and Negative Differential Resistance

数値シミュレーションと解析的モデリングの結合負性静電容量全周囲ゲートトンネルFETの研究【Powered by NICT】

A Compact Quasi-Static Terminal Charge and Drain Current Model for Double-Gate Junctionless Transistors and Its Circuit Validation

Stability of MOSFET-Based Electronic Components in Wearable and Implantable Systems

Investigation of Negative Capacitance Gate-all-Around Tunnel FETs Combining Numerical Simulation and Analytical Modeling

Simulation-based study of negative capacitance double-gate junctionless transistors with ferroelectric gate dielectric

Subthreshold Behaviors of Nanoscale Silicon and Germanium Junctionless Cylindrical Surrounding-Gate MOSFETs

Analytical drain current model for long-channel double-gate negative capacitance junctionless transistors using Landau theory

Analytical drain current model for long-channel gate-all-around negative capacitance transistors with a metal–ferroelectric–insulator–semiconductor structure

A two-dimensional analytical model for short channel junctionless double-gate MOSFETs

Investigation of line tunnel field effect transistor with Ge/Si heterojunction

A carrier-based analytic theory for electrical simulation of negative capacitance surrounding gate ferroelectric capacitor

A study of subthreshold behavior of short-channel junctionless cylindrical surrounding-gate MOSFETs from an electrostatic potential viewpoint

A carrier-based analytical theory for negative capacitance symmetric double-gate field effect transistors and its simulation verification

A rigorous analytical model for short-channel junctionless double-gate MOSFETs

Investigation of the junctionless line tunnel field-effect transistor

Analytical short-channel behavior models of Junctionless Cylindrical Surrounding-Gate MOSFETs

预印本

Emerging Oscillating Reactions at the Insulator/Semiconductor Solid/Solid Interface via Proton Implantation

Enhanced low-flux sensitivity (ELFS) effect of neutron-induced displacement damage in bipolar devices: physical mechanism and parametric model

研究方向