薛晓勇

2026

基于忆阻器的视杆细胞光感模型与电路设计

《电子与信息学报》

2026

DS-eDRAM: Mode-Adaptive Dynamic-Static 2T-1C HZO eDRAM with Temperature-Aware Operation and Shared-Path Sensing for Energy-Efficient SPM in AI Accelerators

IEEE International Symposium on Circuits and Systems proceedings

DOI

2026

Test-Oriented Taxonomy and Full-Stack Verification Flows for Digital Processing-Near-Memory Systems

IEEE International Test Conference in Asia (ITC-Asia)

DOI

2026

PipeCHX: A High-Bandwidth-Low-Latency Hybrid CXL Memory Controller

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

DOI

2026

Reconfigurable and multifunctional circuits using the Stark effect in black phosphorus

Nature Physics

DOI

2025

LoRA-CIM: A Fully-Digital Hybrid Flash-SRAM CIM Accelerator with LoRA Fine-Tuned LLM in Edge Devices

IEEE Asian Solid-State Circuits Conference (A-SSCC)

DOI

2025

DRAM-Centric Near-Data Processing: A Survey of Architectures, Technologies, and Trends

IEEE International Conference on ASIC (ASICON)

DOI

2025

Booth-Assisted Mixed-Precision Reconfigurable Digital Computing-in-Memory Engine With Ternary-Input 1T2R ReRAM for Edge AI

IEEE Transactions on Circuits and Systems I Regular Papers

DOI

2025

A Hybrid Processing-in-Memory and Computing-in-Memory Architecture for Large Language Model Inference in Edge Devices

IEEE International Conference on ASIC (ASICON)

DOI

2025

Reliability Enhancement in HfO 2 -Based FeRAM: Circuit-Level Solutions for Insufficient Polarization and Memory Window Degradation

IEEE International Conference on ASIC (ASICON)

DOI

2025

Garbage collection optimization with data separation for large data storage in deep learning applications

Microelectronics Journal

DOI

2025

Enhancing All-to-All RRAM Ising Machines With Randomized Granular Update Strategies for Solving Combinatorial Optimization Problems

IEEE Transactions on Circuits and Systems I Regular Papers

DOI

2024

SET Tolerable SRAM Hardened by DMR Circuit With Feedback-Split-Gate Voter and High-Speed Hierarchical Structure

IEEE Transactions on Circuits and Systems - II - Express Briefs

DOI

2024

Lifetime Improvement of 28 nm Resistive Random Access Memory Chip by Machine Learning‐Assisted Prediction Model Collaborated with Resurrection Algorithm

DOI

2024

Emerging Optoelectronic Devices for Brain‐Inspired Computing

Advanced Electronic Materials

DOI

2024

EF-CIM: An Endurance Friendly CIM Accelerator Using Embedded NVM With Bit-Aware Wear Leveling for Efficient Light-Weight On-Chip Training in Edge Devices

IEEE Transactions on Circuits and Systems I Regular Papers

DOI

2024

An FPGA-Based Dual-Mode SSD for Device-Side Performance Optimization

DOI

2024

Light-CIM: A Lightweight ADC/DAC-Fewer RRAM CIM DNN Accelerator With Fully Analog Tiles and Nonideality-Aware Algorithm for Consumer Electronics

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

DOI

2024

A 28-nm 36 Kb SRAM CIM Engine With 0.173 μm2 4T1T Cell and Self-Load-0 Weight Update for AI Inference and Training Applications

IEEE Journal of Solid-State Circuits

DOI

2024

Computing in Memory for Accelerating Light-Weighted On-Chip Learning in IoT Devices

DOI

2024

A 1024-Spin Scalable Ising Machine With Capacitive Coupling and Progressive Annealing Method for Combination Optimization Problems

IEEE Transactions on Circuits & Systems II Express Briefs

DOI

2024

A Heuristic and Greedy Weight Remapping Scheme with Hardware Optimization for Irregular Sparse Neural Networks Implemented on CIM Accelerator in Edge AI Applications

Asia and South Pacific Design Automation Conference (ASP-DAC)

DOI

2023

A 1T2R1C ReRAM CIM Accelerator With Energy-Efficient Voltage Division and Capacitive Coupling for CNN Acceleration in AI Edge Applications

IEEE Transactions on Circuits and Systems - II - Express Briefs

DOI

2023

Area-Efficient 1T-2D-2MTJ SOT-MRAM Cell for High Read Performance

IEEE Transactions on Circuits and Systems - II - Express Briefs

DOI

2023

An Emerging NVM CIM Accelerator With Shared-Path Transpose Read and Bit-Interleaving Weight Storage for Efficient On-Chip Training in Edge Devices

IEEE Transactions on Circuits and Systems - II - Express Briefs

DOI

2023

Endurance Prediction Based on Hidden Markov Model and Programming Optimization for 28nm 1Mbit Resistive Random Access Memory Chip

IEEE Electron Device Letters

DOI

2023

ARBiS: A Hardware-Efficient SRAM CIM CNN Accelerator With Cyclic-Shift Weight Duplication and Parasitic-Capacitance Charge Sharing for AI Edge Application

IEEE Transactions on Circuits and Systems Part 1: Regular Papers

DOI

2023

NBSSN: A Neuromorphic Binary Single-Spike Neural Network for Efficient Edge Intelligence

International Symposium on Circuits and Systems

DOI

2023

Tempo-CIM: A RRAM Compute-in-Memory Neuromorphic Accelerator With Area-Efficient LIF Neuron and Split-Train-Merged-Inference Algorithm for Edge AI Applications

IEEE Journal on Emerging and Selected Topics in Circuits and Systems

DOI

2023

A 9Mb HZO-Based Embedded FeRAM with 1012-Cycle Endurance and 5/7ns Read/Write using ECC-Assisted Data Refresh and Offset-Canceled Sense Amplifier

IEEE International Solid-State Circuits Conference

DOI

2023

Anisotropic mass transport enables distinct synaptic behaviors on 2D material surface

Materials Today Electronics

DOI

2022

All-Electrical Control of Compact SOT-MRAM: Toward Highly Efficient and Reliable Non-Volatile In-Memory Computing

Micromachines

DOI

2022

A Dual-Mode ReRAM CIM Macro for Low Power Memory-Augmented Neural Networks

IEEE International Conference on Solid-State and Integrated Circuit Technology

DOI

2022

A 28 nm 81 Kb 59–95.3 TOPS/W 4T2R ReRAM Computing-in-Memory Accelerator With Voltage-to-Time-to-Digital Based Output

IEEE Journal on Emerging and Selected Topics in Circuits and Systems

DOI

2022

A 2D2R ReRAM CIM accelerator for multilayer perceptron in visual classification applications

Microelectronics Journal

DOI

2022

Compute-in-Memory for Numerical Computations

Micromachines

DOI

2022

NIMBLE: A Neuromorphic Learning Scheme and Memristor Based Computing-in-Memory Engine for EMG Based Hand Gesture Recognition

International Symposium on Circuits and Systems

DOI

2022

A 28 nm 512 Kb adjacent 2T2R RRAM PUF with interleaved cell mirroring and self-adaptive splitting for high density and low BER cryptographic key in IoT devices

Microelectronics Journal

DOI

2022

Probabilistic Circuit Implementation Based on P-Bits Using the Intrinsic Random Property of RRAM and P-Bit Multiplexing Strategy

Micromachines

DOI

2022

The Trend of Emerging Non-Volatile TCAM for Parallel Search and AI Applications

Chip

DOI

2022

3T2M canted-type x SOT-MRAM: Field-free, high-energy-efficiency, and high-read-margin memory toward cache applications

Journal of Science Advanced Materials and Devices

DOI

2021

Algorithm/Hardware Co-Design Configurable SAR ADC with Low Power for Computing-in-Memory in 28nm CMOS

International Conference on ASIC

DOI

2021

High-Density 3-D Stackable Crossbar 2D2R nvTCAM With Low-Power Intelligent Search for Fast Packet Forwarding in 5G Applications

IEEE Journal of Solid-State Circuits

DOI

2021

Logic gates based on neuristors made from two-dimensional materials

Nature Electronics

DOI

2021

Combining Max Pooling and ReLU Activation Function in Stochastic Computing

International Conference on ASIC

DOI

2021

24.2 A 14nm-FinFET 1Mb Embedded 1T1R RRAM with a 0.022µ m2 Cell Size Using Self-Adaptive Delayed Termination and Multi-Cell Reference

IEEE International Solid-State Circuits Conference

DOI

2021

MSPAN: A Memristive Spike-Based Computing Engine With Adaptive Neuron for Edge Arrhythmia Detection

Frontiers in Neuroscience

DOI

2021

Novel 15T SRAM Cell for Low Voltage High Reliability Application

International Conference on ASIC

DOI

2021

Orthogonal obfuscation based key management for multiple IP protection

Integr.

DOI

2021

Intra-array Non-Idealities Modeling and Algorithm Optimization for RRAM-based Computing-in-Memory Applications

International Conference on ASIC

DOI

2021

An Energy Efficient Computing-in-Memory Accelerator With 1T2R Cell and Fully Analog Processing for Edge AI Applications

IEEE Transactions on Circuits and Systems - II - Express Briefs

DOI

2020

一种新型纳米器件逻辑纠错专用集成电路架构

《半导体技术》

DOI

2020

A Novel PUF Using Stochastic Short-Term Memory Time of Oxide-Based RRAM for Embedded Applications

International Electron Devices Meeting

DOI

2020

A Machine-Learning-Resistant 3D PUF with 8-layer Stacking Vertical RRAM and 0.014% Bit Error Rate Using In-Cell Stabilization Scheme for IoT Security Applications

International Electron Devices Meeting

DOI

2020

A 16-bit Arithmetic Logic Unit Design by Using Gate Diffusion Input

IEEE International Conference on Solid-State and Integrated Circuit Technology

DOI

2020

A 28nm 1.5Mb Embedded 1T2R RRAM with 14.8 Mb/mm2 using Sneaking Current Suppression and Compensation Techniques

2020 IEEE Symposium on VLSI Circuits

DOI

2020

Binary Convolutional Neural Network Based on 3d Field-Programmable Ferroelectric Diode Array

Social Science Research Network

DOI

2020

Robust True Random Number Generator Using Stochastic Short-term Recovery of Charge Trapping FinFET for Advanced Hardware Security

2020 IEEE Symposium on VLSI Technology

DOI

2020

A Low Power 4T2C nvSRAM With Dynamic Current Compensation Operation Scheme

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

DOI

2019

A 0.75 V reference clamping sense amplifier for low-power high-density ReRAM with dynamic pre-charge technique

IEICE Electronics Express

DOI

2019

A RISC-V Processor with Area-Efficient Memristor-Based In-Memory Computing for Hash Algorithm in Blockchain Applications

Micromachines

DOI

2019

Complementary Memory Cell Based on Field-Programmable Ferroelectric Diode for Ultra-Low Power Current-SA Free BNN Applications

International Electron Devices Meeting

DOI

2019

A 28nm 512Kb adjacent 2T2R RRAM PUF with interleaved cell mirroring and self-adaptive splitting for extremely low bit error rate of cryptographic key

International Symposium on Security in Computing and Communications

DOI

2019

An Orthogonal Algorithm for Key Management in Hardware Obfuscation

Asian Hardware-Oriented Security and Trust Symposium

DOI

2019

A High Reliability 500 µW Resistance-to-Digital Interface Circuit for SnO2 Gas Sensor IoT Applications

International Conference on ASIC

DOI

2019

Nonvolatile Binary CNN Accelerator with Extremely Low Standby Power using RRAM for IoT Applications

International Conference on ASIC

DOI

2019

Investigation of Nitridation on the Band Alignment at MoS2/HfO2 Interfaces

Nanoscale Research Letters

DOI

2018

Novel Hybrid Computing Architecture with Memristor-Based Processing-in-Memory for Data-Intensive Applications

IEEE International Conference on Solid-State and Integrated Circuit Technology

DOI

2018

A Physically Unclonable Function with BER < 0.35% for Secure Chip Authentication Using Write Speed Variation of RRAM

European Solid-State Device Research Conference

DOI

2018

Nonvolatile Crossbar 2D2R TCAM with Cell Size of 16.3 F2 and K-means Clustering for Power Reduction

International Symposium on Security in Computing and Communications

DOI

2017

一种降低DRAM系统刷新功耗的混合主存设计

《复旦学报(自然科学版)》

2017

ReRAM write circuit with dynamic uniform and small overshoot compliance current under PVT variations

International Conference on ASIC

DOI

2017

A 1.0–3.0GHz LTE transmitter with CIM enhancement

International Conference on ASIC

DOI

2017

Dynamic Data-Dependent Reference to Improve Sense Margin and Speed of Magnetoresistive Random Access Memory

IEEE Transactions on Circuits and Systems - II - Express Briefs

DOI

2017

A small area and low power true random number generator using write speed variation of oxidebased RRAM for IoT security application

International Symposium on Circuits and Systems

DOI

2016

IR压降实时多点检测的两种方法

《半导体技术》

2016

一种解决半选择单元干扰问题的SRAM设计方案

《复旦学报(自然科学版)》

2016

A SPICE model of bi-layer resistive random access memory with stepped reset phenomenon

IEEE International Conference on Solid-State and Integrated Circuit Technology

DOI

2016

A self-adaptive write driver with fast termination of step-up pulse for ReRAM

IEICE Electronics Express

DOI

2016

この問題を解決するために,半選択セルの干渉問題を解決するためのSRAM設計方式を提案した。【JST・京大機械翻訳】

2016

A Logic Resistive Memory Chip for Embedded Key Storage With Physical Security

IEEE Transactions on Circuits and Systems - II - Express Briefs

DOI

2016

A compact pico-second in-situ sensor using programmable ring oscillators for advanced on chip variation characterization in 28nm HKMG

International Symposium on Circuits and Systems

DOI

2016

A SRAM Design Solution to Half-Select Disturbance Problem

2016

Novel 3D horizontal RRAM architecture with isolation cell structure for sneak current depression

International Symposium on Circuits and Systems

DOI

2016

Low-Power Variation-Tolerant Nonvolatile Lookup Table Design

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

DOI

2015

CuxSiyO阻变存储器单粒子和总剂量辐照效应

《半导体技术》

2015

Impacts of external magnetic field and high temperature disturbance on MRAM reliability based on FPGA test platform

International Conference on ASIC

DOI

2015

A low cost and high reliability true random number generator based on resistive random access memory

International Conference on ASIC

DOI

2015

3D vertical RRAM architecture and operation algorithms with effective IR-drop suppressing and anti-disturbance

International Symposium on Circuits and Systems

DOI

2015

RRAM Device and Circuit

DOI

2014

Adaptive Block level management for hybrid main memory

IEEE International Conference on Solid-State and Integrated Circuit Technology

DOI

2014

Fast step-down set algorithm of resistive switching memory with low programming energy and significant reliability improvement

Symposium on VLSI Technology

DOI

2013

阻变存储器读电路的优化设计

《复旦学报(自然科学版)》

2013

基于CuxSiyO阻变材料的RRAM抗总剂量辐照性能

《复旦学报(自然科学版)》

2013

A logic-based embedded DRAM with novel cell structure and dynamically adaptive refresh for long data retention, zero data availability penalty and high yield

2013 5th IEEE International Memory Workshop

DOI

2013

A 2Mb ReRAM with two bits error correction codes circuit for high reliability application

2013 IEEE 10th International Conference on ASIC

DOI

2013

A 0.13 µm 8 Mb Logic-Based Cu $_{\rm x}$Si $_{\rm y}$O ReRAM With Self-Adaptive Operation for Yield Enhancement and Power Reduction

IEEE Journal of Solid-State Circuits

DOI

2013

Reliability significant improvement of resistive switching memory by dynamic self-adaptive write method

Symposium on VLSI Technology

2012

A novel low power wide supply voltage range CMOS temperature sensor with ‒0.2/0.5°C error from −20°C to 60°C

IEEE International Conference on Solid-State and Integrated Circuit Technology

DOI

2012

A novel method for accurate measurement and decoupling of SRAM standby leakage

IEEE International Conference on Solid-State and Integrated Circuit Technology

DOI

2012

A 0.13µm 8Mb logic based CuxSiyO resistive memory with self-adaptive yield enhancement and operation power reduction

Symposium on VLSI Circuits

DOI

2012

64Kb logic RRAM chip resisting physical and side-channel attacks for encryption keys storage

IEICE Electronics Express

DOI

2011

新型存储器在FPGA中应用的关键技术研究

《复旦大学》

2011

Novel 2T programmable element to improve density and performance of FPGA

IEICE Electronics Express

DOI

2011

Novel RRAM programming technology for instant-on and high-security FPGAs

2011 9th IEEE International Conference on ASIC

DOI

2010

A 3D RRAM Using a Stackable Multi-Layer 1TXR Cell

IEICE transactions on electronics

DOI

2009

A 3D RRAM using stackable 1TXR memory cell for high density application

International Conference on Communications, Circuits and Systems

DOI

2008

Nonvolatile SRAM cell based on CuxO

2008 9th International Conference on Solid-State and Integrated-Circuit Technology

DOI

2008

Ultra-low power consumption nonvolatile static random access memory cell and operation method thereof